ltspice pll simulations, xor vs pfd

We offer an all-digital PLL module that works with a PMOD FPGA board. While this is a departure from the basic analog pll concepts on this page the functionality is similar and starting with these simulations will give you a good basis to continue on programming and developing your own PLL implementations.

The above files are intended as a basic example of two different types of PLL, an XOR PLL and a PFD PLL.  An XOR‑based PLL is the simplest form of digital phase detector, comparing only the instantaneous logic levels of two signals. This makes it easy to implement and useful for demonstrating basic PLL behavior, but it provides no frequency detection and produces a sinusoidal‑like gain curve that becomes ambiguous near lock. A dual‑DFF phase‑frequency detector, by contrast, offers true phase and frequency detection with clean, directional UP/DOWN outputs and a wide linear operating range. This makes the dual‑DFF PFD far more robust, especially during acquisition or when dealing with noisy or mismatched signals. Comparing the two highlights how PLL performance, lock behavior, and stability improve dramatically when moving from a simple XOR detector to a full PFD architecture.